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The carrier synchronization track technique of digital intermediate frequency receiving machine is introduced,which is important for receiving the signal of satellites.In the seriously dynamic situation,the inconsistency among the bandwidth,velocity and precision of capture for carrier synchronization should be resolved.Integrating the traditional FDLL and DPLL,a new loop project is designed,which frequency lock associated with phase lock,and it's suitable for digital intermediate frequency receiving machine in seriously dynamic situation.The analysis and simulation by computer is carried out,and the feasibility and advantage are proved.Then the hardware framework with ADC+FPGA+DSP for digital intermediate frequency receiving machine of satellite signal is well-founded.
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Basic Information:
DOI：10.16358/j.issn.1009-1300.2012.03.001
China Classification Code:TN858
Citation Information:
[1]Wang Guangding1,2,You Fuchu1,Fang Jiancheng2(1.The 303th Institute of the Third Research Academy,CASIC,Beijing 100074,China, 2.Beijing University of Aeronautics and Astronautics,Beijing 100191,China).Loop Design of Digital Intermediate Frequency Receiving Machine Based on Carrier Track Technique of Frequency Lock Associated with Phase Lock[J].Tactical Missile Technology,2012,No.153(03):1-7+12.DOI:10.16358/j.issn.1009-1300.2012.03.001.
2012-05-15
2012-05-15